device-summa

The smallest complete device package. A function marked @ nucleum is a compute kernel; the manifest's [device] section is what makes the packaged image carry Metal MSL and CUDA PTX artifacts. This is the starter fixture behind the faber run --backend metal|cuda path.

Source: examples/training/device-summa

`src/device_summa.fab`#

reader locale

faber format --locale en — English reader surface

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ kernel { }
fn summa(tensor<f32, [256]> a, tensor<f32, [1]> out, int<u32> id) → void {
    const f32 total ← a.summa()
    out[id] ← total
}

faber format --locale la — canonical Faber

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ nucleum { }
functio summa(tensor<f32, [256]> a, tensor<f32, [1]> out, numerus<u32> id) → vacuum {
    fixum f32 total ← a.summa()
    out[id] ← total
}

faber format --locale th-TH — Thai

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ เคอร์เนล { }
ฟังก์ชัน summa(เทนเซอร์<f32, [256]> a, เทนเซอร์<f32, [1]> out, จำนวน<u32> id) → เปล่า {
    คงที่ f32 total ← a.summa()
    out[id] ← total
}

faber format --locale zh-Hans — Simplified Chinese

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ 内核 { }
函数 summa(张量<f32, [256]> a, 张量<f32, [1]> out, 整数<u32> id) → 无值 {
    常量 f32 total ← a.summa()
    out[id] ← total
}

faber format --locale zh-Hant — Traditional Chinese

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ 內核 { }
函式 summa(張量<f32, [256]> a, 張量<f32, [1]> out, 整數<u32> id) → 空值 {
    定值 f32 total ← a.summa()
    out[id] ← total
}

faber format --locale vi — Vietnamese

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ hạt_nhân { }
hàm summa(ten_xo<f32, [256]> a, ten_xo<f32, [1]> out, số<u32> id) → trống {
    hằng f32 total ← a.summa()
    out[id] ← total
}

faber format --locale ar — Arabic

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ نواة { }
دالة summa(موتر<f32, [256]> a, موتر<f32, [1]> out, عدد<u32> id) → فراغ {
    ثابت f32 total ← a.summa()
    out[id] ← total
}

faber format --locale hi — Hindi

# =============================================================================
# device-summa — S1-6 vertical-slice proof kernel (gpu-training-lowering)
# =============================================================================
#
# What this proves:
#   • One already-proven collection kernel — a tree reduction (`summa`) over a
#     tf32[256] buffer, the R2 `summa` receipt floor — carried from Faber
#     source through the common device program (S1-1), the packaged FMIR
#     image's `device` section (S1-2), the composite host (S1-4), and real
#     Metal/CUDA sessions (S1-6) via the SAME ordinary command:
#
#       faber run --backend metal <package>    # Apple M5 Max (burgus)
#       faber run --backend cuda  <package>    # NVIDIA RTX 5070 (pharos)
#
#   • The kernel body is the proven `summa` proof shape (input buffer + output
#     buffer + u32 id → `workgroup_id.x`); the reduction recipe is the shared
#     `CollectionKernelPlan::TreeReduction` with a 256-lane workgroup, so a
#     single workgroup covers the whole tensor and the output buffer is one
#     element — the exact sum.
#
# The host input values live in faber.toml `[device] inputs` (pinned with the
# oracle); the CPU reference is pinned in oracle/ (numeric-policy v1.0.0,
# reduction-sum row: atol=1e-6, rtol=1e-6).
#
# See also: nucleum, tensor, cuda
# =============================================================================

@ कर्नेल { }
फलन summa(टेंसर<f32, [256]> a, टेंसर<f32, [1]> out, संख्या<u32> id) → रिक्त {
    स्थिर f32 total ← a.summa()
    out[id] ← total
}

---

All examples · Install · Cheat sheet

device-summa

src/device_summa.fab#

`src/device_summa.fab`#